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Showing results 1 to 3 of 3

Issue DateTitleAuthor(s)
2022-12A CMOS Microelectrode Array System With Reconfigurable Sub-Array Multiplexing Architecture Integrating 24,320 Electrodes and 380 Readout ChannelsCha, Ji-Hyoung; Park, Jee-Ho; Park, Yongjae; Shin, Hyogeun; Hwang, Kyeong Seob; Cho, Il-Joo; Kim, Seong-Jin
2022-03A Low-noise CMOS SPAD Pixel with 12.1 ps SPTR and 3 ns Dead TimeGramuglia, F.; Wu, M.; Bruschini, C.; Lee, M.; Charbon, E.
2022-03Engineering Breakdown Probability Profile for PDP and DCR Optimization in a SPAD Fabricated in a Standard 55nm BCD ProcessGramuglia, F.; Keshavarzian, P.; Kizilkan, E.; Bruschini, C.; Tan, S.S.; Tng, M.; Quek, E.; Lee, M.; Charbon, E.
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