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Showing results 1 to 8 of 8

Issue Date	Title	Author(s)
2020-02	3D Stackable Synaptic Transistor for 3D Integrated Artificial Neural Networks	Kim, Seong Kwang; Jeong, YeonJoo; Bidenko, Pavlo; Lim, Hyeong-Rak; Jeon, Yu -Rim; Kim, Hansung; Lee, Yun Jung; Geum, Dae-Myeong; Han, JaeHoon; Choi, Changhwan; Kim, Hyung-jun; Kim, SangHyeon
2019-11	Epitaxial Lift-Off Technology for Large Size III-V-on-Insulator Substrate	Lee, Subin; Kim, Seong Kwang; Han, Jae-Hoon; Song, Jin Dong; Jun, Dong-Hwan; Kim, Sang-Hyeon
2017-09	Fabrication of InGaAs-on-Insulator Substrates Using Direct Wafer-Bonding and Epitaxial Lift-Off Techniques	Kim, Seong Kwang; Shim, Jae-Phil; Geum, Dae-Myeong; Kim, Chang Zoo; Kim, Han-Sung; Song, Jin Dong; Choi, Sung-Jin; Kim, Dae Hwan; Choi, Won Jun; Kim, Hyung-Jun; Kim, Dong Myong; Kim, Sanghyeon
2016-08	Fully subthreshold current-based characterization of interface traps and surface potential in III-V-on-insulator MOSFETs	Kim, Seong Kwang; Lee, Jungmin; Geum, Dae-Myeong; Park, Min-Su; Choi, Won Jun; Choi, Sung-Jin; Kim, Dae Hwan; Kim, Sanghyeon; Kim, Dong Myong
2022-09	Guard-Ring-Free InGaAs/InP Single-Photon Avalanche Diode Based on a Novel One-Step Zn-Diffusion Technique	Kizilkan, Ekin; Karaca, Utku; Pesic, Vladimir; Lee, Myung-Jae; Bruschini, Claudio; SpringThorpe, Anthony J.; Walker, Alexandre W.; Flueraru, Costel; Pitts, Oliver J.; Charbon, Edoardo
2018-05	Impact of Ground Plane Doping and Bottom-Gate Biasing on Electrical Properties in In0.53Ga0.47As-OI MOSFETs and Donor Wafer Reusability Toward Monolithic 3-D Integration With In0.53Ga0.47As Channel	Kim, Seong Kwang; Shim, Jae-Phil; Geum, Dae-Myeong; Kim, Jaewon; Kim, Chang Zoo; Kim, Han-Sung; Song, Jin Dong; Choi, Sung-Jin; Kim, Dae Hwan; Choi, Won Jun; Kim, Hyung-Jun; Kim, Dong Myong; Kim, Sanghyeon
-	MBE Growth of III-V Based Materials and its Applications to 2D/1D/0D Structures	SONG, JIN-DONG
-	Wafer Bonging Process for III-V MOSFET and Monolithic 3D Integration on Si Substrates	Kim Hyung-jun; Sanghyeon Kim

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