Defect-Engineered Semiconducting van der Waals Thin Film at Metal-Semiconductor Interface of Field-Effect Transistors

Authors
Kim, JihyunRhee, DongjoonJung, MyeongjinCheon, Gang JinKim, KangsanKim, Jae HyungPark, Ji YunYoon, JiyongLim, Dong UnCho, Jeong HoKim, In SooSon, DongheeJariwala, DeepKang, Joohoon
Issue Date
2024-01
Publisher
American Chemical Society
Citation
ACS Nano, v.18, no.1, pp.1073 - 1083
Abstract
The significance of metal-semiconductor interfaces and their impact on electronic device performance have gained increasing attention, with a particular focus on investigating the contact metal. However, another avenue of exploration involves substituting the contact metal at the metal-semiconductor interface of field-effect transistors with semiconducting layers to introduce additional functionalities to the devices. Here, a scalable approach for fabricating metal-oxide-semiconductor (channel)-semiconductor (interfacial layer) field-effect transistors is proposed by utilizing solution-processed semiconductors, specifically semiconducting single-walled carbon nanotubes and molybdenum disulfide, as the channel and interfacial semiconducting layers, respectively. The work function of the interfacial MoS2 is modulated by controlling the sulfur vacancy concentration through chemical treatment, which results in distinctive energy band alignments within a single device configuration. The resulting band alignments lead to multiple functionalities, including multivalued transistor characteristics and multibit nonvolatile memory (NVM) behavior. Moreover, leveraging the stable NVM properties, we demonstrate artificial synaptic devices with 88.9% accuracy of MNIST image recognition.
Keywords
nonvolatile memory; van der Waals heterostructure; solution processing; interface; defect engineering; multivaluedtransistor
ISSN
1936-0851
URI
https://pubs.kist.re.kr/handle/201004/112950
DOI
10.1021/acsnano.3c10453
Appears in Collections:
KIST Article > 2024
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