Engineering of AlON interlayer in Al2O3/AlON/In0.53Ga0.47As gate stacks by thermal atomic layer deposition

Authors
Lee, Woo ChulCho, Cheol JinPark, Suk-InJun, Dong-HwanSong, Jin DongHwang, Cheol SeongKim, Seong Keun
Issue Date
2018-08
Publisher
ELSEVIER SCIENCE BV
Citation
CURRENT APPLIED PHYSICS, v.18, no.8, pp.919 - 923
Abstract
The presence of an AlN interfacial layer in high-k/In0.53Ga0.47As gate stacks improves the interfacial properties and enhances the electrical performance of devices. However, pure AlN is rarely grown by atomic layer deposition (ALD) because of the low reactivity of NH3 toward the common Al-precursor and the predisposition to oxidation of the grown AlN layer. Although a plasma-enhanced ALD technique significantly suppresses the oxygen content in the grown AlN layer, the deterioration of the interface properties by plasma-damage is a critical issue. In this work, an AlON interlayer was engineered by optimizing the NH3 feeding time in thermal ALD to improve the interface quality in Al2O3/AlON/In0.53Ga0.47As capacitors. It was determined that a mere increase in the NH3 feeding time during the ALD of the AlON film resulted in a higher nitrogen incorporation into the AlON interlayer, leading to a reduction in the interface trap density. Furthermore, the out-diffusion of elements from the In0.53Ga0.47As layer was effectively suppressed by increasing the NH3 feeding time. This work demonstrates that simple process optimization can improve the interface quality in high-k/In0.53Ga0.47As gate stacks without the use of any plasma-activated nitrogen source.
Keywords
V COMPOUND SEMICONDUCTORS; ELECTRICAL-PROPERTIES; PASSIVATION LAYER; AL2O3; DIELECTRICS; DEVICES; FILMS; V COMPOUND SEMICONDUCTORS; ELECTRICAL-PROPERTIES; PASSIVATION LAYER; AL2O3; DIELECTRICS; DEVICES; FILMS; AlON; InGaAs; Atomic layer deposition; Interface trap density; MOS capacitor
ISSN
1567-1739
URI
https://pubs.kist.re.kr/handle/201004/121089
DOI
10.1016/j.cap.2018.04.020
Appears in Collections:
KIST Article > 2018
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