Micro-architecture embedding ultra-thin interlayer to bond diamond and silicon via direct fusion

Authors
Kim, Jong CheolKim, JongsikXin, YanLee, JinhyungKim, Young-GyunSubhash, GhatuSingh, Rajiv K.Arjunan, Arul C.Lee, Haigun
Issue Date
2018-05-21
Publisher
AMER INST PHYSICS
Citation
APPLIED PHYSICS LETTERS, v.112, no.21
Abstract
The continuous demand on miniaturized electronic circuits bearing high power density illuminates the need to modify the silicon-on-insulator-based chip architecture. This is because of the low thermal conductivity of the few hundred nanometer-thick insulator present between the silicon substrate and active layers. The thick insulator is notorious for releasing the heat generated from the active layers during the operation of devices, leading to degradation in their performance and thus reducing their lifetime. To avoid the heat accumulation, we propose a method to fabricate the silicon-on-diamond (SOD) microstructure featured by an exceptionally thin silicon oxycarbide interlayer (similar to 3 nm). While exploiting the diamond as an insulator, we employ spark plasma sintering to render the silicon directly fused to the diamond. Notably, this process can manufacture the SOD microarchitecture via a simple/rapid way and incorporates the ultra-thin interlayer for minute thermal resistance. The method invented herein expects to minimize the thermal interfacial resistance of the devices and is thus deemed as a breakthrough appealing to the current chip industry. Published by AIP Publishing.
Keywords
ON-DIAMOND; DEVICES; CARBON; TECHNOLOGY; GALLIUM; WAFERS; IMPACT; GAN; SPS; ON-DIAMOND; DEVICES; CARBON; TECHNOLOGY; GALLIUM; WAFERS; IMPACT; GAN; SPS
ISSN
0003-6951
URI
https://pubs.kist.re.kr/handle/201004/121366
DOI
10.1063/1.5030580
Appears in Collections:
KIST Article > 2018
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