A VLSI implementation of real-time 8x8 2-D DCT processor for the subprimary rate video codec.

Title
A VLSI implementation of real-time 8x8 2-D DCT processor for the subprimary rate video codec.
Authors
김형곤권용무
Issue Date
1990-01
Publisher
통신학회논문지
Citation
VOL 제 15 권, 58-70
URI
http://pubs.kist.re.kr/handle/201004/21941
Appears in Collections:
KIST Publication > Article
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE