Self-Aligned Asymmetric Metal-Oxide-Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator
- Self-Aligned Asymmetric Metal-Oxide-Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator
- 김종필; 송재영; 김상완; 박재현; 최우영; 이종덕; 신형철; 박병국
- Issue Date
- Japanese journal of applied physics
- VOL 48, NO 9, 091201-1-091201-5
- We have fabricated the sub-30nm asymmetric n-channel metal–oxide–semiconductor field effect transistors (NMOSFETs) and
investigated its operation and characteristics. In this work, two key ideas are newly introduced in order to improve the device performance.
One is the introduction of silicon-on-insulator (SOI) substrate to remove junction leakage paths. The other is the modification of mask layout
for performance optimization and mass production. By using SOI substrate and modifying mask layout, the ON/OFF current ratio of the
fabricated device is quite increased when we compared with the previous work because the source/drain junction leakage and parasitic
current are suppressed. Moreover, the fabricated device has excellent scaling properties in terms of short channel effect.
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