Self-Aligned Asymmetric Metal-Oxide-Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator

Title
Self-Aligned Asymmetric Metal-Oxide-Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator
Authors
김종필송재영김상완박재현최우영이종덕신형철박병국
Issue Date
2009-09
Publisher
Japanese journal of applied physics
Citation
VOL 48, NO 9, 091201-1-091201-5
Abstract
We have fabricated the sub-30nm asymmetric n-channel metal–oxide–semiconductor field effect transistors (NMOSFETs) and investigated its operation and characteristics. In this work, two key ideas are newly introduced in order to improve the device performance. One is the introduction of silicon-on-insulator (SOI) substrate to remove junction leakage paths. The other is the modification of mask layout for performance optimization and mass production. By using SOI substrate and modifying mask layout, the ON/OFF current ratio of the fabricated device is quite increased when we compared with the previous work because the source/drain junction leakage and parasitic current are suppressed. Moreover, the fabricated device has excellent scaling properties in terms of short channel effect.
URI
http://pubs.kist.re.kr/handle/201004/37214
ISSN
0021-4922
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KIST Publication > Article
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