Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors

Title
Direct wafer bonding technology for large-scale InGaAs-on-insulator transistors
Authors
김상현Yuki IkkuMasafumi YokoyamaRyosho NakaneJian LiYung-Chung KaoMitsuru TakenakaShinichi Takagi
Issue Date
2014-07
Publisher
Applied physics letters
Citation
VOL 105, NO 4, 043504-1-043504-4
Abstract
Heterogeneous integration of III-V devices on Si wafers have been explored for realizing high device performance as well as merging electrical and photonic applications on the Si platform. Existing methodologies have unavoidable drawbacks such as inferior device quality or high cost in comparison with the current Si-based technology. In this paper, we present InGaAs-on-insulator (-OI) fabrication from an InGaAs layer grown on a Si donor wafer with a III-V buffer layer instead of growth on a InP donor wafer. This technology allows us to yield large wafer size scalability of III-V-OI layers up to the Si wafer size of 300mm with a high film quality and low cost. The high film quality has been confirmed by Raman and photoluminescence spectra. In addition, the fabricated InGaAs-OI transistors exhibit the high electron mobility of 1700 cm2/V s and uniform distribution of the leakage current, indicating high layer quality with low defect density.
URI
http://pubs.kist.re.kr/handle/201004/48748
ISSN
00036951
Appears in Collections:
KIST Publication > Article
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE