Low-temperature electrical characterization of junctionless transistors

Title
Low-temperature electrical characterization of junctionless transistors
Authors
전대영So Jeong ParkMireille MouisSylvain BarraudGyu-Tae KimGerard Ghibaudo
Keywords
junctionless transistors; scattering mechanisms; implantation induced defects; flat-band voltage; threshold voltage
Issue Date
2013-02
Publisher
Solid-state electronics
Citation
VOL 80-141
Abstract
The electrical performance of junctionless transistors (JLTs) with planar structures was investigated under low-temperature and compared to that of the traditional inversion-mode (IM) transistors. The low-field mobility (mu(o)) of JLT devices was found to be limited by phonon and neutral defects scattering mechanisms for long gate lengths, whereas scattering by charged and neutral defects mostly dominated for short gate lengths, likely due to the defects induced by the source/drain (S/D) implantation added in the process. Moreover, the temperature dependence of flat-band voltage (V-fb), threshold voltage (V-th) and subthreshold swing (S) of JLT devices was also discussed.
URI
http://pubs.kist.re.kr/handle/201004/66488
ISSN
0038-1101
Appears in Collections:
KIST Publication > Article
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