Z(2)-FET as Capacitor-Less eDRAM Cell For High-Density Integration

Title
Z(2)-FET as Capacitor-Less eDRAM Cell For High-Density Integration
Authors
김용태김성일Binjie ChengCryille Le RoyerSiegfried KargHeike RielPaul WellsAsen AsenovFrancisco GamizCarlos NavarroMeng DuanMukta Singh PariharFikru Adamu LemaStefan CosermanJoris LacordKyunghwa LeeCarlos SampedroHassan El DiraniJean Charles BarbePascal FonteneauSorin CristolovenauMaryline BawedinCampbell MillarPhilippe Galy
Keywords
Z2FET; eDRAM; High Density Integration; 28nm; low power; FD-SOI
Issue Date
2017-12
Publisher
IEEE transactions on electron devices
Citation
VOL 64, NO 12-4909
Abstract
2-D numerical simulations are used to demonstrate the Z2-FET as a competitive embedded capacitorless dynamic random access memory cell for low-power applications. Experimental results in 28-nm fully depletedsilicon on insulator technology are used to validate the simulations prior to downscaling tests. Default scaling, without any structure optimization, and enhanced scaling scenarios are considered before comparing the bit cell area consumption and integration density with other eDRAM cells in the literature.
URI
http://pubs.kist.re.kr/handle/201004/66522
ISSN
0018-9383
Appears in Collections:
KIST Publication > Article
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