A review of the Z2-FET 1T-DRAM memory: Operation mechanisms and key parameters

Title
A review of the Z2-FET 1T-DRAM memory: Operation mechanisms and key parameters
Authors
김용태S. CristoloveanuK.H. LeeM.S. PariharH.El DiraniJ. LacordS. MartinieC. Le RoyerJ.-Ch. BarbeX. MescotP. FonteneauPh. GalyF. GamizC. NavarroB. ChengM. DuanF. Adamn LemaA. AsenovY. TaurY. XuJ. WanM. Bawedin
Keywords
1T DRAM; Zero subthreshold slope; Z2FET; 10nm SOI film; Low power; high current margin
Issue Date
2018-05
Publisher
Solid-state electronics
Citation
VOL 143, NO S1-19
Abstract
The band-modulation and sharp-switching mechanisms in Z2-FET device operated as a capacitorless 1T-DRAM memory are reviewed. The main parameters that govern the memory performance are discussed based on detailed experiments and simulations. This 1T-DRAM memory does not suffer from super-coupling effect and can be integrated in sub-10  nm thick SOI films. It offers low leakage current, high current margin, long retention, low operating voltage especially for programming, and high speed. The Z2-FET is suitable for embedded memory applications.
URI
http://pubs.kist.re.kr/handle/201004/67854
ISSN
0038-1101
Appears in Collections:
KIST Publication > Article
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