On the Low-Frequency Noise Characterization of Z2-FET Devices

Title
On the Low-Frequency Noise Characterization of Z2-FET Devices
Authors
김용태CARLOS MARQUEZCARLOS NAVARROSANTIAGO NAVARROJOSE L. PADILLALUCA DONETTICARLOS SAMPEDROPHILIPPE GALYFRANCISCO GAMIZ
Keywords
1T-DRAM; noise measurement; semiconductor device reliability; p-i-n diodes; silicon on insulator technology; Z2-FET
Issue Date
2019-02
Publisher
IEEE transactions on electron devices
Citation
VOL 7-42556
Abstract
This paper addresses the low-frequency noise characterization of Z2-FET structures. These double-gated p-i-n diode devices have been fabricated at STMicroelectronics in an ultrathin body and box (UTBB) 28-nm FDSOI technology and designed to operate as 1T-DRAM memory cells, although other applications, as for example electro static discharge (ESD) protection, have been reported. The experimentally extracted power spectral density of current reveals that the high-diode series resistance, carrier number uctuations due to oxide traps, and gate leakage current are the main noise contributors at high-current regimes. These mechanisms are expected to contribute to the degradation of cell variability and retention time. Higher icker noise levels have been reported when increasing the vertical electric eld. A simple model considering the contribution of the main noise sources is proposed.
URI
http://pubs.kist.re.kr/handle/201004/69302
ISSN
0018-9383
Appears in Collections:
KIST Publication > Article
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