Epitaxial Lift-Off Technology for Large Size III-V-on-Insulator Substrate

Title
Epitaxial Lift-Off Technology for Large Size III-V-on-Insulator Substrate
Authors
송진동한재훈Subin LeeSeong Kwang KimDong-Hwan JunSang-Hyeon Kim
Keywords
Monolithic 3D integration; InGaAs; III-V; MOS HEMTs; InGaAs-OI; wafer bonding
Issue Date
2019-11
Publisher
IEEE Electron Device Letters
Citation
VOL 40, NO 11-1735
Abstract
III-V materials can be a very good channel candidate for monolithic 3D (M3D) integration due to the potential of high-performance and lower process temperature as compared with Si, since a low process temperature is crucial to avoid degradation of bottom devices. For III-V M3D integration, material transfer techniques are important, and such processes should be enabled by low process costs on a large wafer scale. In this study, we propose an InGaAs channel transfer technique by wafer bonding, epitaxial lift-off and III-V layers grown on Si substrate. Effective mobility of fabricated MOS HEMTs using transferred InGaAs layer was 1.3 times higher than that of Si MOSFETs. The proposing channel transfer technique would be useful for M3D integration because it provides wafer scalability, cost-effectiveness, back-gate biasing, and etc.
URI
http://pubs.kist.re.kr/handle/201004/70364
ISSN
0741-3106
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KIST Publication > Article
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