Multiple-gate CMOS thin-film transistor with polysilicon nanowire

Title
Multiple-gate CMOS thin-film transistor with polysilicon nanowire
Authors
임매순한진우이현진유리은김성호김창훈전상철김광희이기성오재섭박윤창이희목최양규
Issue Date
2008-01
Publisher
IEEE Electron Device Letters
Citation
VOL 29, NO 1-105
Abstract
An ultimately scaled multiple-gate CMOS thin-film transistor with a polysilicon (poly-Si) nanowire demonstrates feasibility for vertical integration using multiple active layers for application in the terabit memory era. The short-channel effects are suppressed using a multiple gate to wrap around the nanowire in devices with a size of a few tenths of a nanometer. The switching and output characteristics show high device performance without a crystallization process for the poly-Si nanowire.
URI
http://pubs.kist.re.kr/handle/201004/71042
ISSN
0741-3106
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KIST Publication > Article
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