A 73% Peak PDP Single-Photon Avalanche Diode Implemented in 110 nm CIS Technology with Doping Compensation

Authors
Lee, Myung-JaeKaraca, UtkuKizilkan, EkinBruschini, ClaudioCharbon, Edoardo
Issue Date
2024-01
Publisher
Institute of Electrical and Electronics Engineers
Citation
IEEE Journal on Selected Topics in Quantum Electronics, v.30, no.1, pp.1 - 10
Abstract
In this paper, we present 10 μm diameter SPADs fabricated in 110 nm CIS technology based on an N + /HVPW junction, with enhanced sensitivity at short wavelengths. To reduce tunneling noise due to the highly-doped layers in the process, a doping compensation technique is used, which allows to adjust the doping profile of the HVPW. Thanks to this technique, DCR is reduced by a factor of 24 at 2 V excess bias voltage when compared to non-compensated devices. Furthermore, the maximum achievable PDP is enhanced by 49% thanks to the much lower DCR leading to a PDP of 73%, the highest ever reported at 440 nm, while the DCR is 12.5 cps/μm 2 , all at the 5 V excess bias. Since the junction is formed very close to the surface, the SPAD has excellent sensitivity in the UV spectrum, with a PDP of 43% at a wavelength of 350 nm. The proposed SPAD also achieves a PDP of 7% with a timing jitter of 68 ps at 850 nm at 5 V excess bias, which makes the device very useful for RGB-Z (RGB-D) sensors.
Keywords
CMOS; EFFICIENCY; DESIGN; SENSOR; SPAD; Single-photon avalanche diodes; CMOS image sensor technology; doping compensation; high sensitivity; RGB-Z multispectral camera
ISSN
1077-260X
URI
https://pubs.kist.re.kr/handle/201004/79901
DOI
10.1109/jstqe.2023.3288674
Appears in Collections:
KIST Article > 2023
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