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dc.contributor.author민병철-
dc.contributor.author이억재-
dc.date.accessioned2024-01-12T17:00:53Z-
dc.date.available2024-01-12T17:00:53Z-
dc.date.issued2021-01-05-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/91894-
dc.title이중 자기층 최적화를 통한 저전력 스핀 궤도 토크 자성 메모리-
dc.typePatent-
dc.date.registration2021-01-05-
dc.date.application2018-11-20-
dc.identifier.patentRegistrationNumber10,886,457-
dc.identifier.patentApplicationNumber16/196,659-
dc.publisher.countryUS-
dc.type.iprs특허-
dc.contributor.assignee한국과학기술연구원-
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KIST Patent > 2018
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