Kim, Younghee Jin, Hongzhou Kim, Dohoon Ha, Panbong Park, Min-Kyu Hwang, Joon Lee, Jongho Woo, Jeong-Min 최지연 Lee, Changhyuk Kwak, Joon Young Son, Hyunwoo 2024-01-19T10:03:54Z 2024-01-19T10:03:54Z 2023-03-10 2023-02 2079-9292 https://pubs.kist.re.kr/handle/201004/114020 This paper presents a synaptic driving circuit design for processing in-memory (PIM) hardware with a thin-film transistor (TFT) embedded flash (eFlash) for a binary/ternary-weight neural network (NN). An eFlash-based synaptic cell capable of programming negative weight values to store binary/ternary weight values (i.e., +/- 1, 0) and synaptic driving circuits for erase, program, and read operations of synaptic arrays have been proposed. The proposed synaptic driving circuits improve the calculation accuracy of PIM operation by precisely programming the sensing current of the eFlash synaptic cell to the target current (50 nA +/- 0.5 nA) using a pulse train. In addition, during PIM operation, the pulse-width modulation (PWM) conversion circuit converts 8-bit input data into one continuous PWM pulse to minimize non-linearity in the synaptic sensing current integration step of the neuron circuit. The prototype chip, including the proposed synaptic driving circuit, PWM conversion circuit, neuron circuit, and digital blocks, is designed and laid out as the accelerator for binary/ternary weighted NN with a size of 324 x 80 x 10 using a 0.35 mu m CMOS process. Hybrid bonding technology using bump bonding and wire bonding is used to package the designed CMOS accelerator die and TFT eFlash-based synapse array dies into a single chip package. English MDPI AG Design of Synaptic Driving Circuit for TFT eFlash-Based Processing-In-Memory Hardware Using Hybrid Bonding Article 10.3390/electronics12030678 1 Electronics (Basel), v.12, no.3 Electronics (Basel) 12 3 Y scie scopus 000929203300001 2-s2.0-85147877242 Computer Science, Information Systems Engineering, Electrical & Electronic Physics, Applied Computer Science Engineering Physics Article NEURAL-NETWORK FLASH MEMORY EFFICIENT SRAM thin-film transistor (TFT) embedded flash (eFlash) binary ternary weight neural network processing-in-memory (PIM) accelerator synapse cell hybrid bonding