Chong, Eugene Kim, Bosul Lee, Sang Yeol 2024-01-19T12:37:02Z 2024-01-19T12:37:02Z 2022-03-07 2012 1757-8981 https://pubs.kist.re.kr/handle/201004/115693 A silicon-indium-zinc-oxide (SIZO) thin film transistor (TFT) with low channel-resistance (R-CH) indium-zinc-oxide (In2O3:ZnO = 9:1) buried layer annealed at low temperature of 200 degrees C exhibited high field-effect mobility (mu(FE)) over 55.8 cm(2)/V.s which is 5 times higher than that of the conventional TFTs due to small threshold voltage (V-th) change of 1.8 V under bias-temperature stress (BTS) condition for 420 minutes. The low-R-CH buried-layer allows more strong current-path formed in channel layer well within relatively high-R-CH channel-layer since it is less affected by the channel bulk and/or back interface trap with high carrier concentration. English IOP PUBLISHING LTD Reduction of channel resistance in amorphous oxide thin-film transistors with buried layer Conference 10.1088/1757-899X/34/1/012005 1 Symposium I on Advances in Transparent Electronics, from Materials to Devices III/Fall Meeting of the European-Materials-Research-Society (E-MRS), v.34 Symposium I on Advances in Transparent Electronics, from Materials to Devices III/Fall Meeting of the European-Materials-Research-Society (E-MRS) 34 UK Warsaw, POLAND 2011-09-19 E-MRS 2011 FALL SYMPOSIUM I: ADVANCES IN TRANSPARENT ELECTRONICS, FROM MATERIALS TO DEVICES III 000306116700005 2-s2.0-84861316128 Proceedings Paper