Choi, Sanghyeon Choi, Jae-Wan Kim, Jong Chan Jeong, Hu Young Shin, Jaeho Jang, Seonghoon Ham, Seonggil Kim, Nam Dong Wang, Gunuk 2024-01-19T14:32:11Z 2024-01-19T14:32:11Z 2022-01-10 2021-06 2211-2855 https://pubs.kist.re.kr/handle/201004/116902 A three-terminal memristor is an electronic memory architecture that is particularly suitable for next-generation devices owing to its customizable intrinsic switching characteristics. However, its slow switching speed and lack of high-density array structure has hindered its applicability thus far. In this study, we have designed and fabricated a novel architecture by vertically integrating a silicon oxide (SiOx) memristor and a graphene barristor, which can be readily extended to a 16 x 16 crossbar array. Notably, the unipolar resistive switching of the SiOx memristor can be actively modulated by controlling a silicon (Si) phase filament via the barristor's electrostatic gating. Such gate-tunable SiOx memristor in the array was observed to exhibit excellent electrical performance, e.g., increased switching speed (up to -35 ns), increased switching probability, enhanced uniformity, and decreased operating voltage. The energy consumption is also significantly improved 4 nJ to 2 pJ via the gating, which exhibits lower than other three-terminal memristors. Moreover, it was able to sustain a high ON-OFF ratio (>106), multi-bit capability (-9 states), and stable endurance and retention properties regardless of gating. As an additional potential application, nonvolatile universal logic gates, including NOT, NOR, and NAND gates, were successfully implemented in this study based on simple circuits containing gate-tunable SiOx memristors. We believe that the proposed gate-tunable SiOx memristor represents a distinctive and novel development toward a fast, low energy, and extendable three-terminal memristor platform for electronic devices, thus undertaking a major step in unleashing the potential of memristors to support the growing demands of cutting-edge technologies. English ELSEVIER RESISTIVE SWITCHES GRAPHENE BARRISTOR SILICON DEVICES Energy-efficient three-terminal SiOx memristor crossbar array enabled by vertical Si/graphene heterojunction barristor Article 10.1016/j.nanoen.2021.105947 1 NANO ENERGY, v.84 NANO ENERGY 84 scie scopus 000649695700004 2-s2.0-85101980314 Chemistry, Physical Nanoscience & Nanotechnology Materials Science, Multidisciplinary Physics, Applied Chemistry Science & Technology - Other Topics Materials Science Physics Article RESISTIVE SWITCHES GRAPHENE BARRISTOR SILICON DEVICES Energy-efficient Three-terminal memristor Graphene barristor Gate-tunable memristor Crossbar array Electrostatic gating Nonvolatile universal logic gates Silicon oxide (SiOx)