Shim, Jae-Phil Kim, Han-Sung Ju, Gunwu Lim, Hyeong-Rak Kim, Seong Kwang Han, Jae-Hoon Kim, Hyung-Jun Kim, Sang-Hyeon 2024-01-19T23:30:36Z 2024-01-19T23:30:36Z 2021-09-03 2018-03 0018-9383 https://pubs.kist.re.kr/handle/201004/121674 In this brief, we fabricated Ge (110)-on-insulator (-OI) structures on Si substrates viawafer bonding and epitaxial lift-off (ELO) process using Ge layer grown on GaAs for low-temperature layer stacking toward monolithic 3-D integration. We also systematically investigated the lateral etching behaviors of AlAs, which was used as a sacrificial layer in the ELO process, on GaAs (110) substrates. Fabricated Ge (110)-OI was analyzed by surface atomic force microscopy, X-ray diffraction, Raman shift, and transmission electron microscope analyses. We found that the 40-nm-thick ultrathin-body Ge (110)-OI has very high crystal quality, indicating our Ge stacking process is very stable. English IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC SI SUBSTRATE Low-Temperature Material Stacking of Ultrathin Body Ge (110)-on-Insulator Structure via Wafer Bonding and Epitaxial Liftoff From III-V Templates Article 10.1109/TED.2018.2793285 1 IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.3, pp.1253 - 1257 IEEE TRANSACTIONS ON ELECTRON DEVICES 65 3 1253 1257 scie scopus 000425996300065 2-s2.0-85041337985 Engineering, Electrical & Electronic Physics, Applied Engineering Physics Article SI SUBSTRATE Epitaxial liftoff (ELO) Ge Ge-on insulator (OI) heterogeneous integration monolithic 3-D (M3-D) wafer bonding