Kim, Seong Kwang Shim, Jae-Phil Geum, Dae-Myeong Kim, Chang Zoo Kim, Han-Sung Song, Jin Dong Choi, Sung-Jin Kim, Dae Hwan Choi, Won Jun Kim, Hyung-Jun Kim, Dong Myong Kim, Sanghyeon 2024-01-20T00:33:54Z 2024-01-20T00:33:54Z 2021-09-05 2017-09 0018-9383 https://pubs.kist.re.kr/handle/201004/122344 Defect less semiconductor-on-insulator (-OI) by a cost-effective and low-temperature process is strongly needed for monolithic 3-D integration. Toward this, in this paper, we present a cost-effective fabrication of the indium gallium arsenide-OI structure featuring the direct wafer bonding (DWB) and epitaxial lift-off (ELO) techniques as well as the reuse of the indium phosphide donor wafer. We systematically investigated the effects of the prepatterning of the III-V layer before DWB and surface reforming (hydrophilic) to speed up the ELO process for a fast and high-throughput process, which is essential for cost reduction. Thismethod provides an excellent crystal quality of In0.53Ga0.47As on Si. Crystal quality of the film was evaluated using Raman spectra, and transmission electron microscope. Finally, we achieved good electrical properties of In0.53Ga0.47As-OImetal-oxide-semiconductorfield-effect-transistors fabricated through the proposed DWB and ELO. English IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC Fabrication of InGaAs-on-Insulator Substrates Using Direct Wafer-Bonding and Epitaxial Lift-Off Techniques Article 10.1109/TED.2017.2722482 1 IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.9, pp.3594 - 3601 IEEE TRANSACTIONS ON ELECTRON DEVICES 64 9 3594 3601 scie scopus 000408118700011 2-s2.0-85023641599 Engineering, Electrical & Electronic Physics, Applied Engineering Physics Article III-V III-V compound semiconductor epitaxial lift-off (ELO) indium gallium arsenide (InGaAs) InGaAs-on-insulator (OI) metal-oxide-semiconductor field-effect-transistors (MOSFETs) wafer bonding