Takagi, S. Noguchi, M. Kim, M. Kim, S. -H. Chang, C. -Y. Yokoyama, M. Nishi, K. Zhang, R. Ke, M. Takenaka, M. 2024-01-20T03:02:25Z 2024-01-20T03:02:25Z 2021-09-05 2016-11 0038-1101 https://pubs.kist.re.kr/handle/201004/123491 CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the promising devices for high performance and low power integrated systems in the future technology nodes, because of the enhanced carrier transport properties. In addition, Tunneling-FETs (TFETs) using Ge/III-V materials are regarded as one of the most important steep slope devices for the ultra-low power applications. In this paper, we address the device and process technologies of Ge/III-V MOSFETs and TFETs on the Si CMOS platform. The channel formation, source/drain (S/D) formation and gate stack engineering are introduced for satisfying the device requirements. The plasma post oxidation to form GeOx interfacial layers is a key gate stack technology for Ge CMOS. Also, direct wafer bonding of ultrathin body quantum well III-V-OI channels, combined with Tri-gate structures, realizes high performance III-V n-MOSFETs on Si. We also demonstrate planar-type InGaAs and Ge/strained SOI TFETs. The defect-less p(+)-n source junction formation with steep impurity profiles is a key for high performance TFET operation. (C) 2016 Elsevier Ltd. All rights reserved. English PERGAMON-ELSEVIER SCIENCE LTD FIELD-EFFECT-TRANSISTORS SELECTIVE-AREA GROWTH N-MOSFETS HIGH-MOBILITY GATE-STACKS ELECTRICAL-PROPERTIES SURFACE PASSIVATION CARRIER-TRANSPORT INTERFACE TRAPS P-FETS III-V/Ge MOS device technologies for low power integrated systems Article 10.1016/j.sse.2016.07.002 1 SOLID-STATE ELECTRONICS, v.125, pp.82 - 102 SOLID-STATE ELECTRONICS 125 82 102 scie scopus 000386231700009 2-s2.0-84979499894 Engineering, Electrical & Electronic Physics, Applied Physics, Condensed Matter Engineering Physics Article FIELD-EFFECT-TRANSISTORS SELECTIVE-AREA GROWTH N-MOSFETS HIGH-MOBILITY GATE-STACKS ELECTRICAL-PROPERTIES SURFACE PASSIVATION CARRIER-TRANSPORT INTERFACE TRAPS P-FETS MOSFET Tunneling FET Germanium III-V semiconductors Metal-Oxide-Semiconductor Mobility Interface states