Kornijcuk, Vladimir Lim, Hyungkwang Seok, Jun Yeong Kim, Guhyun Kim, Seong Keun Kim, Inho Choi, Byung Joon Jeong, Doo Seok 2024-01-20T04:03:54Z 2024-01-20T04:03:54Z 2021-09-05 2016-05-23 1662-4548 https://pubs.kist.re.kr/handle/201004/124054 The artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (<100 Hz) with a capacitor of merely 6 fF, which is hosted in an FG metal-oxide-semiconductor field-effect transistor. The FG-LIF neuron also has the advantage of low operation power (<30 pW/spike). Finally, the proposed circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex. English FRONTIERS MEDIA SA RANDOM TELEGRAPH NOISE TUNNELING CURRENT SPIKING NEURONS SILICON SYNAPSES MODEL ELECTRODE DESIGN ARRAY Leaky Integrate-and-Fire Neuron Circuit Based on Floating-Gate Integrator Article 10.3389/fnins.2016.00212 1 FRONTIERS IN NEUROSCIENCE, v.10 FRONTIERS IN NEUROSCIENCE 10 scie scopus 000376245500001 2-s2.0-84973532127 Neurosciences Neurosciences & Neurology Article RANDOM TELEGRAPH NOISE TUNNELING CURRENT SPIKING NEURONS SILICON SYNAPSES MODEL ELECTRODE DESIGN ARRAY floating-gate integrator leaky integrate-and-fire neuron spiking neural network synaptic transistor spatial integration