Lee, Dong Uk Lee, Min Seung Lee, Tae Hee Kim, Eun Kyu Kim, Won Mok 2024-01-20T22:36:01Z 2024-01-20T22:36:01Z 2021-09-03 2008-09 0374-4884 https://pubs.kist.re.kr/handle/201004/133201 A nano-floating gate capacitor with double-layered An nano-particles embedded in a SiO1.3N layer was fabricated and characterized. The Au nano-particles were formed from An thin film with a nominal thickness of 1 nm and their average size and density were about 4 nm and 2 x 1012 cm(-2), respectively. After the post-annealing process at 800 degrees C for 10 s, the flat-band voltage shift of the nano-floating gate capacitor with double-layered An nano-particles was about 9 V when the applied gate voltage was swept from -10 V to +10 V. Significantly, the flat-band voltage shifts were improved after the post-annealing process. The double-layered An nano-particles embedded in a SiO1.3N dielectric showed feasibility as nano-floating gate capacitors for nonvolatile memories. English KOREAN PHYSICAL SOC ELECTRICAL CHARACTERIZATION NANOCRYSTALS MEMORY Charging effect of a nano-floating gate capacitor with double-layered Au nano-particles Article 10.3938/jkps.53.1484 1 JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.53, no.3, pp.1484 - 1487 JOURNAL OF THE KOREAN PHYSICAL SOCIETY 53 3 1484 1487 scie scopus kci ART001472554 000259194800037 2-s2.0-53549117994 Physics, Multidisciplinary Physics Article; Proceedings Paper ELECTRICAL CHARACTERIZATION NANOCRYSTALS MEMORY nano-particles SiON Au nano-floating gate memory