KIM, CH KWON, SD CHOE, BD HAN, IK LEE, JI KANG, KN HER, J LIM, H 2024-01-21T22:15:16Z 2024-01-21T22:15:16Z 2022-01-10 1993-10 0374-4884 https://pubs.kist.re.kr/handle/201004/145981 The time dependence of the low-field charge-trapping behavior in silicon-nitride/InP metal-insulator-semiconductor structures was investigated by the constant-capacitance technique and C-V measurement. Silicon-nitride films were formed by a conventional plasma-enhanced chemical-vapor-deposition technique. The main traps were identified as silicon dangling bonds for all samples. The rate-limiting process of the charge trapping behavior at room temperature was found to be direct tunneling or hopping between traps depending on their density. The minimum trap density for hopping conduction was estimated to be about 1 X 10(19) cm-3. It was also found that a deficiency of phosphorus at the interface might induce net negative fixed charges in PECVD-grown silicon-nitride/InP MIS structures. English KOREAN PHYSICAL SOC ELECTRICAL HYSTERESIS DEEP TRAP STATES INSTABILITIES CAPACITORS INTERFACE DEFECTS STUDY ON THE LOW-FIELD CHARGE-TRAPPING PHENOMENA IN THE SILICON-NITRIDE INP STRUCTURE Article 1 JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.26, no.5, pp.518 - 523 JOURNAL OF THE KOREAN PHYSICAL SOCIETY 26 5 518 523 scie A1993MB82000016 Physics, Multidisciplinary Physics Article ELECTRICAL HYSTERESIS DEEP TRAP STATES INSTABILITIES CAPACITORS INTERFACE DEFECTS charge-trapping phenomena