Yang, Seung-Jae Lee, Jae-Ho Lee, Myung-Jae Choi, Woo-Young 2024-07-26T05:00:35Z 2024-07-26T05:00:35Z 2024-07-25 2024-07 0733-8724 https://pubs.kist.re.kr/handle/201004/150299 An850 nm monolithic optical receiver is realized with the standard 28 nm complementary metal-oxide-semiconductor (CMOS) technology without any process modification or design rule violation. The single-chip optical receiver contains a Si avalanche photodetector (APD) and an underdamped trans-impedance amplifier (TIA) which compensates the Si APD bandwidth limitation. The Si APD characteristics are measured and modeled with an equivalent circuit that accurately emulates the Si APD frequency responses and the noise characteristics. Using this model, the optimal design of the receiver circuit is carried out. The fabricated monolithic optical receiver achieves 20 Gb/s operation. English Optical Society of America A 20 Gb/s CMOS Single-Chip 850 nm Optical Receiver Article 10.1109/JLT.2024.3374707 1 Journal of Lightwave Technology, v.42, no.13, pp.4525 - 4530 Journal of Lightwave Technology 42 13 4525 4530 N scie scopus 001266361400013 2-s2.0-85187323457 Engineering, Electrical & Electronic Optics Telecommunications Engineering Optics Telecommunications Article SILICON AVALANCHE PHOTODETECTORS OPTOELECTRONIC RECEIVER TECHNOLOGY PERFORMANCE Avalanche photodetector monolithic optical receiver multiple junctions optical interconnect silicon photodiode silicon photonics standard CMOS technology