Park, Jongkil Jeong, YeonJoo Kim, Jaewook Lee, Suyoun Kwak, Joon Young Park, Jong-Keuk Kim, Inho 2024-09-19T00:00:28Z 2024-09-19T00:00:28Z 2024-09-14 2024-04 2834-9830 https://pubs.kist.re.kr/handle/201004/150606 This paper presents a large-scale digital neuromorphic processor for spiking neural network emulation. The processor is fabricated in a 28 nm CMOS and occupies a 9.00 mm(2) die area for 262,144 neurons. A time-embedded floating-point leaky integrate-and-fire neuron model is implemented to reduce the size of SRAM and the number of SRAM accesses. It achieves a high-density neuron integration (34.9 k neurons/mm(2)), which is 13 times higher than other state-of-the-art designs. Additionally, it achieves a high-dynamic range synapse (8-bit floating-point) and low energy consumption (28.26 pJ/synaptic operation). English IEEE High-Density Digital Neuromorphic Processor with High-Precision Neural and Synaptic Dynamics and Temporal Acceleration Conference 10.1109/AICAS59952.2024.10595869 1 6th International Conference on AI Circuits and Systems (AICAS), pp.322 - 326 6th International Conference on AI Circuits and Systems (AICAS) 322 326 US Abu Dhabi, U ARAB EMIRATES 2024-04-22 2024 IEEE 6TH INTERNATIONAL CONFERENCE ON AI CIRCUITS AND SYSTEMS, AICAS 2024 001280469200017 2-s2.0-85199873783