Kim, Dong Yeong Rho, Hokyun Lee, Eunyoung Kim, Junwoo Bae, Sukang Kim, Tae-Wook Lee, Sang Hyun 2025-06-05T02:00:34Z 2025-06-05T02:00:34Z 2025-06-04 2025-10 1976-4251 https://pubs.kist.re.kr/handle/201004/152562 The distinctive surface characteristics of two-dimensional(2D) materials present a significant challenge when developing heterostructures for electronic or optoelectronic devices. In this study, we present a method for fabricating top-gate graphene field-effect transistors (FETs) by incorporating a metal interlayer between the dielectric and graphene. The deposition of an ultrathin Ti layer facilitates the formation of a uniform HfO2 layer on the graphene surface via atomic layer deposition (ALD). During the ALD process, the Ti layer oxidizes to TiO2, which has a negligible impact on the current flow along the graphene channel. The mobility of graphene in the FET was enhanced in relation to the SiO2-based back-gate FET by modifying the thin HfO2 top-gate dielectric deposited on the Ti interlayer. Furthermore, shifts in the Dirac point and subthreshold swing were markedly reduced owing to the reduction in charge scattering caused by the presence of trap sites at the interface between graphene and SiO2. This route to modulating the interface between 2D material-based heterostructures will provide an opportunity to improve the performance and stability of 2D electronics and optoelectronics. English 한국탄소학회 Interfacial control for uniformly depositing oxide dielectrics in top-gate graphene field-effect transistors Article 10.1007/s42823-025-00923-5 1 Carbon Letters, v.35, no.5, pp.2299 - 2305 Carbon Letters 35 5 2299 2305 N scie scopus kci ART003273887 001497718800001 Chemistry, Multidisciplinary Materials Science, Multidisciplinary Chemistry Materials Science Article ATOMIC-LAYER-DEPOSITION HFO2 FILMS PERFORMANCE INTEGRATION GROWTH Graphene Dielectrics Field-effect transistor Interfacial layer Atomic layer deposition