Low-Temperature Material Stacking of Ultrathin Body Ge (110)-on-Insulator Structure via Wafer Bonding and Epitaxial Liftoff From III-V Templates - Shim, Jae-Phil; Kim, Han-Sung; Ju, Gunwu; Lim, Hyeong-Rak; Kim, Seong Kwang; Han, Jae-Hoon; Kim, Hyung-Jun; Kim, Sang-Hyeon (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2018)
In this brief, we fabricated Ge (110)-on-insulator (-OI) structures on Si substrates viawafer bonding and epitaxial lift-off (ELO) process using Ge layer grown on GaAs for low-temperature layer stacking toward monolithic 3-D integration. We also systematically investigated the lateral etching behaviors of AlAs, which was used as a sacrificial layer in the ELO process, on GaAs (110) substrates. Fabricated Ge (110)-OI was analyzed by surface atomic force microscopy, X-ray diffraction, Raman shift, and transmission electron microscope analyses. We found that the 40-nm-thick ultrathin-body Ge (110)-OI has very high crystal quality, indicating our Ge stacking process is very stable.
Keywords: SI SUBSTRATE