Special memory mechanisms in SOI devices - Cristoloveanu, S.; Bawedin, M.; Navarro, C.; Chang, S.-J.; Wan, J.; Andrieu, F.; Le, Royer C.; Rodriguez, N.; Gamiz, F.; Zaslavsky, A.; Kim, Y.T. (ECS Transactions, 2015)
Several types of floating-body capacitorless 1T-DRAM memory cells with planar SOI or multi-gate configuration are reviewed and compared. We show that 1T-DRAMs are also compatible with the 'unified memory' paradigm which aims at combining, within a single SOI transistor, volatile, nonvolatile and multiple-state memory functionalities. We focus on our recently proposed concepts (MSDRAM, A2RAM and Z2-FET), by addressing the device architecture and fabrication, operating mechanisms, and scaling issues. Experimental results together with numerical simulations indicate the directions for performance optimization. ？ The Electrochemical Society.