A pentagonal 2D layered PdSe2-based synaptic device with a graphene floating gate

Authors
Park, EunpyoSeo, Jae EunNoh, GichangJo, YooyeonWoo, Dong YeonKim, In SooPark, JongkilKim, JaewookJeong, YeonJooLee, SuyounKim, InhoPark, Jong-KeukKim, SangbumChang, JiwonKwak, Joon Young
Issue Date
2022-11
Publisher
Royal Society of Chemistry
Citation
Journal of Materials Chemistry C, v.43, pp.16536 - 16545
Abstract
Recently, two-dimensional (2D) materials have attracted great attention from researchers to overcome the limitations of conventional semiconductor materials. Specifically, 2D materials offer great advantages for low power consumption and robust endurance, which are required to achieve the key characteristics of non-volatile memory. Herein, we introduce a pentagonal 2D layered PdSe2 channel-based floating gate memory with a positive threshold voltage, which can potentially enable the device to be turned off around zero gate bias to reduce power consumption, and observe a multi-bit conductance state with reliable retention time. We demonstrated 64 levels of conductance states to mimic synaptic weight behaviors with only using positive voltage pulses. An artificial neural network emulation based on our device demonstrated a high handwritten digit recognition accuracy of similar to 90%. In addition, one of the popular biological learning rules, spike-timing-dependent plasticity (STDP), was successfully realized in the device with identical triangular-shaped pulses by applying them separately. The experimental results from our device suggest promising potential for use in the field of non-volatile memory devices and in neuromorphic systems.
Keywords
MOS2; PHOTOTRANSISTORS; NONVOLATILE; TRANSISTORS; ARRAY; WS2
ISSN
2050-7526
URI
https://pubs.kist.re.kr/handle/201004/114401
DOI
10.1039/d2tc03544h
Appears in Collections:
KIST Article > 2022
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