Scalable Integration of Single-Crystalline Ag Nanosheets for Threshold Voltage Engineering in Oxide Thin-Film Transistors
- Authors
- Joo, Hyeonji; Song, Young-Seok; Bhise, Sneha; Baek, Seokhyeon; Kim, Seungyeon; Kim, Dae-Hong; Yang, Hee Yun; Kim, Jae-Keun; Bae, Sukang; Moon, Byung Joon; Lee, Seoung-Ki; Kim, Do-Hyung; Park, Sungjun; Kim, Tae-Wook
- Issue Date
- 2025-11
- Publisher
- American Chemical Society
- Citation
- ACS Nano, v.19, no.46, pp.39890 - 39902
- Abstract
- Amorphous oxide semiconductor-based thin-film transistors (TFTs), particularly those utilizing indium gallium zinc oxide (IGZO), have garnered significant attention for next-generation display backplanes and flexible electronics. However, the precise and reliable modulation of threshold voltage (V th) remains a persistent challenge, often requiring doping or vacancy engineering approaches that compromise process uniformity and device reliability. In this study, we introduce a scalable and low-temperature strategy for V th tuning via the incorporation of two-dimensional (2D), single-crystalline silver nanosheets (Ag NSs) within the IGZO channel. These quasi-two-dimensional nanostructures have nanometer-scale thickness and lateral single crystallinity and are assembled using an ultrasonic-driven solution process that allows tunable coverage over large-area substrates. By varying Ag NS coverage up to 6.8%, we achieve a systematic and reproducible positive shift in V th, with minimal degradation in mobility, on/off ratio, and subthreshold swing. Mechanistic studies using X-ray photoelectron spectroscopy and electrical bias stress testing reveal that the modulation arises from Schottky barrier formation and electrostatic screening at the Ag-IGZO interface rather than from modulation of oxygen vacancy concentrations. Devices incorporating Ag NSs exhibit excellent stability, with minimal hysteresis (Delta V th approximate to 1 V), negligible parameter drift under a +/- 20 V gate bias stress for 60 min, and long-term retention after 390 days of ambient storage. To validate the circuit-level applicability of this method, we fabricated depletion-load NMOS inverters combining pristine and Ag NS-modified IGZO TFTs, wherein the switching threshold could be finely tuned via the Ag NS coverage. This work demonstrates a wafer-compatible and solution-processable route to deterministic V th engineering in oxide TFTs, offering a promising platform for future high-performance, flexible, and large-area electronic systems.
- Keywords
- PERFORMANCE; GRAPHENE; TEMPERATURE; amorphous In-Ga-Zn-O (a-IGZO) thin-filmtransistor; silver nanosheet (Ag NS); thresholdvoltage engineering; Schottky barrier and electrostatic screening; low-temperature solution processing
- ISSN
- 1936-0851
- URI
- https://pubs.kist.re.kr/handle/201004/153662
- DOI
- 10.1021/acsnano.5c13526
- Appears in Collections:
- KIST Article > 2025
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