First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology
- Title
- First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology
- Authors
- 이명재; Pengfei Sun; Gregory Pandraud; Claudio Bruschini; Edoardo Charbon
- Keywords
- backside etching, backside illumination (BSI); CMOS image sensor; Geiger-mode avalanche photodiode (G-APD); integration of photonics in standard CMOS; near infrared (NIR); near ultraviolet (NUV); photomultiplier; RGB-D sensor; silicon on insulator (SOI); single-photon avalanche diode (SPAD)
- Issue Date
- 2019-05
- Publisher
- IEEE journal on selected topics in quantum electronics
- Citation
- VOL 25, NO 5-3800206-6
- Abstract
- We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backside etching, comparable to DCRs of BSI SPADs fabricated on bulk wafers. Unlike bulk-wafer-based BSI SPADs, which typically suffer from poor violet and blue sensitivity, the proposed BSI SPAD features increased near-ultraviolet sensitivity as well as significant sensitivity in the violet and blue spectral ranges, thanks to the ultrathin-body SOI. To the best of our knowledge, this is the best result ever reported for any BSI SPAD in the standard CMOS technology. In addition, it also shows high sensitivity at long wavelengths thanks to the interface between silicon and silicon-dioxide layers. Therefore, it achieves a photon detection probability over 26% at 500 nm and 10% in the 400-875 nm wavelength range at 3 V excess bias voltage. The timing jitter is 119 ps full width at half maximum at the same operation condition at 637 nm wavelength. For the proposed BSI SPAD, the buried oxide layer in SOI wafers is used as an etching stop during the wafer backside-etching process, and therefore it ensures the excellent performance uniformity in large arrays.
- URI
- https://pubs.kist.re.kr/handle/201004/70896
- ISSN
- 1077-260X
- Appears in Collections:
- KIST Publication > Article
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