Multiple bit operation of MFISFET with Pt/SrBi2Ta2O9/Y2O3/Si gate structure

Authors
Il Shim, SKwon, YSKim, ISKim, SIKim, YTPark, JH
Issue Date
2004-08
Publisher
Gordon and Breach Science Publishers
Citation
Integrated Ferroelectrics, v.65, pp.203 - 211
Abstract
A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.
Keywords
SEMICONDUCTOR; METAL; Y2O3; ferroelectric; MFISFET; multi-level; SBT; FRAM
ISSN
1058-4587
URI
https://pubs.kist.re.kr/handle/201004/137382
DOI
10.1080/10584580490893079
Appears in Collections:
KIST Article > 2004
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