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dc.contributor.authorKo, Kyul-
dc.contributor.authorAhn, Dae-Hwan-
dc.contributor.authorJeong, Jai-Youn-
dc.contributor.authorJu, Byeong-Kwon-
dc.contributor.authorHan, Jae-Hoon-
dc.date.accessioned2024-09-18T23:30:06Z-
dc.date.available2024-09-18T23:30:06Z-
dc.date.created2024-09-13-
dc.date.issued2024-10-
dc.identifier.issn0018-9383-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/150602-
dc.description.abstractWe study device structures and their design points of HfZrO X -based InGaAs metal-ferroelectric-metal-insulator-semiconductor (MFMIS) ferroelectric tunnel FETs (Fe-TFETs) based on ferroelectric (FE) polarization-controlled band-to-band tunneling (BTBT) for stable nonvolatile memory (NVM) operation. We monolithically integrated a HfZrO X MFM capacitor into the baseline tunnel field-effect transistor (TFET), which has steep subthreshold swing (SS) characteristics of sub-60 mV/decade with a HfO2 /Al2O3 gate-stack, compared to the reference MOSFET. We found temperature-stable NVM behaviors of the InGaAs Fe-TFET compared to the InGaAs ferroelectric MOSFETs (Fe-MOSFETs) at the measurement temperature range from - 20 C-degrees to 85 C-degrees. Furthermore, we explored the scaling effects of the MFMIS structure using a high- kappa HfO2 gate insulator layer to pursue a steep SS, and a large capacitance ratio between the dielectric (DE) and FE capacitors. The InGaAs MFMIS-structure Fe-TFET achieves stable retention over 10(4) s and excellent endurance during 10 6 cycles at the DE/FE capacitance ratio of 27.5.-
dc.languageEnglish-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleDesign Points of InGaAs MFMIS Tunnel FET for Large Memory Window and Stable Ferroelectric Memory Operation-
dc.typeArticle-
dc.identifier.doi10.1109/TED.2024.3449255-
dc.description.journalClass1-
dc.identifier.bibliographicCitationIEEE Transactions on Electron Devices, v.71, no.10, pp.6435 - 6441-
dc.citation.titleIEEE Transactions on Electron Devices-
dc.citation.volume71-
dc.citation.number10-
dc.citation.startPage6435-
dc.citation.endPage6441-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.type.docTypeArticle; Early Access-
dc.subject.keywordPlusTRANSISTORS-
dc.subject.keywordPlusFUTURE-
dc.subject.keywordAuthorIron-
dc.subject.keywordAuthorIndium gallium arsenide-
dc.subject.keywordAuthorTFETs-
dc.subject.keywordAuthorCapacitors-
dc.subject.keywordAuthorMOSFET-
dc.subject.keywordAuthorLogic gates-
dc.subject.keywordAuthorHafnium oxide-
dc.subject.keywordAuthorFerroelectric (FE) FET-
dc.subject.keywordAuthorHf0.5Zr0.5O2(HZO)-
dc.subject.keywordAuthorInGaAs-
dc.subject.keywordAuthormetal-ferroelectric-metal-insulator-semiconductor (MFMIS)-
dc.subject.keywordAuthortunnel FET-
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