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dc.contributor.authorKIM, Hyoung Gon-
dc.contributor.authorKwon, Yong Moo-
dc.date.accessioned2024-01-12T11:41:40Z-
dc.date.available2024-01-12T11:41:40Z-
dc.date.created2022-01-14-
dc.date.issued1994-01-01-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/86043-
dc.titleA PIPELINED ARCHITECTWRE FOR VLSI LMPLEMENTATION OF QUANTIGER/INVESE QUAMTIGA FOR VIDEO CODEC-
dc.typeConference-
dc.description.journalClass1-
dc.identifier.bibliographicCitationICSPAT '94, pp.1737 - 1742-
dc.citation.titleICSPAT '94-
dc.citation.startPage1737-
dc.citation.endPage1742-
dc.relation.isPartOfPROC. OF ICSPAT-
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