3D Wafer Stacking Overview for Vertical Interconnects

Authors
Kim Eun Kyung
Citation
Semicon Korea 2006
Keywords
Wafer Stacking; 3D Interconnect
URI
https://pubs.kist.re.kr/handle/201004/104456
Appears in Collections:
KIST Conference Paper > Others
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML

qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE