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dc.contributor.authorKang, Ji-Hoon-
dc.contributor.authorShin, Heechang-
dc.contributor.authorKim, Ki Seok-
dc.contributor.authorSong, Min-Kyu-
dc.contributor.authorLee, Doyoon-
dc.contributor.authorMeng, Yuan-
dc.contributor.authorChoi, Chanyeol-
dc.contributor.authorSuh, Jun Min-
dc.contributor.authorKim, Beom Jin-
dc.contributor.authorKim, Hyunseok-
dc.contributor.authorHoang, Anh Tuan-
dc.contributor.authorPark, Bo-In-
dc.contributor.authorZhou, Guanyu-
dc.contributor.authorSundaram, Suresh-
dc.contributor.authorVuong, Phuong-
dc.contributor.authorShin, Jiho-
dc.contributor.authorChoe, Jinyeong-
dc.contributor.authorXu, Zhihao-
dc.contributor.authorYounas, Rehan-
dc.contributor.authorKim, Justin S.-
dc.contributor.authorHan, Sangmoon-
dc.contributor.authorLee, Sangho-
dc.contributor.authorKim, Sun Ok-
dc.contributor.authorKang, Beomseok-
dc.contributor.authorSeo, Seungju-
dc.contributor.authorAhn, Hyojung-
dc.contributor.authorSeo, Seunghwan-
dc.contributor.authorReidy, Kate-
dc.contributor.authorPark, Eugene-
dc.contributor.authorMun, Sungchul-
dc.contributor.authorPark, Min-Chul-
dc.contributor.authorLee, Suyoun-
dc.contributor.authorKim, Hyung-Jun-
dc.contributor.authorKum, Hyun S.-
dc.contributor.authorLin, Peng-
dc.contributor.authorHinkle, Christopher-
dc.contributor.authorOugazzaden, Abdallah-
dc.contributor.authorAhn, Jong-Hyun-
dc.contributor.authorKim, Jeehwan-
dc.contributor.authorBae, Sang-Hoon-
dc.date.accessioned2024-01-19T08:02:52Z-
dc.date.available2024-01-19T08:02:52Z-
dc.date.created2023-12-21-
dc.date.issued2023-12-
dc.identifier.issn1476-1122-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/113034-
dc.description.abstractThree-dimensional (3D) hetero-integration technology is poised to revolutionize the field of electronics by stacking functional layers vertically, thereby creating novel 3D circuity architectures with high integration density and unparalleled multifunctionality. However, the conventional 3D integration technique involves complex wafer processing and intricate interlayer wiring. Here we demonstrate monolithic 3D integration of two-dimensional, material-based artificial intelligence (AI)-processing hardware with ultimate integrability and multifunctionality. A total of six layers of transistor and memristor arrays were vertically integrated into a 3D nanosystem to perform AI tasks, by peeling and stacking of AI processing layers made from bottom-up synthesized two-dimensional materials. This fully monolithic-3D-integrated AI system substantially reduces processing time, voltage drops, latency and footprint due to its densely packed AI processing layers with dense interlayer connectivity. The successful demonstration of this monolithic-3D-integrated AI system will not only provide a material-level solution for hetero-integration of electronics, but also pave the way for unprecedented multifunctional computing hardware with ultimate parallelism. Monolithic 3D integration of electronics based on fully 2D materials is demonstrated in the performance of artificial intelligence tasks.-
dc.languageEnglish-
dc.publisherNature Publishing Group-
dc.titleMonolithic 3D integration of 2D materials-based electronics towards ultimate edge computing solutions-
dc.typeArticle-
dc.identifier.doi10.1038/s41563-023-01704-z-
dc.description.journalClass1-
dc.identifier.bibliographicCitationNature Materials, v.22, no.12, pp.1470 - 1477-
dc.citation.titleNature Materials-
dc.citation.volume22-
dc.citation.number12-
dc.citation.startPage1470-
dc.citation.endPage1477-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.identifier.wosid001114078300001-
dc.identifier.scopusid2-s2.0-85178105873-
dc.relation.journalWebOfScienceCategoryChemistry, Physical-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalWebOfScienceCategoryPhysics, Condensed Matter-
dc.relation.journalResearchAreaChemistry-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalResearchAreaPhysics-
dc.type.docTypeArticle-
dc.subject.keywordPlusSYSTEM-ON-CHIP-
dc.subject.keywordPlusFUTURE-
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KIST Article > 2023
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