Vertical homo-junction In0.53Ga0.47As tunneling field-effect transistors with minimum subthreshold swing of 52 mV/decade

Abstract

In this work, we successfully fabricated vertical homo-junction In0.53Ga0.47As tunneling field-effect transistors (TFETs) by a top-down approach. We particularly focused on recovery of the sidewall damage induced during dry etching of the In0.53Ga0.47As layer. The recovery steps comprised a series of digital etching cycles, short wet etching of the In0.53Ga0.47As layer, and (NH4)(2)S-based treatment. The fabricated device with a gate length of 100 nm exhibited a minimum subthreshold swing of 52 mV/decade at room temperature and an average sub-threshold swing of 60 mV/decade over more than two decades of drain current. We also fabricated and analyzed In0.53Ga0.47As metal-oxidesemiconductor capacitors and metal-oxidesemiconductor field-effect transistors to investigate the effect of the S-treatment on their electrical characteristics.