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dc.contributor.authorLu, W.-
dc.contributor.authorRoh, I. P.-
dc.contributor.authorGeum, D. -M.-
dc.contributor.authordel Alamo, J. A.-
dc.contributor.authorSong, J. D.-
dc.contributor.authorKong, L.-
dc.contributor.authorKim, S. -H.-
dc.date.accessioned2024-01-19T11:07:00Z-
dc.date.available2024-01-19T11:07:00Z-
dc.date.created2022-02-28-
dc.date.issued2017-12-
dc.identifier.issn2380-9248-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/114603-
dc.description.abstractWe have fabricated self-aligned InGaSb p-channel FinFETs using a novel antimonide-compatible digital etch. This is the first demonstration of digital etch on InGaSb-based transistors of any kind. It has enabled the first fabricated InGaSb FinFETs featuring fin widths down to 10 nm and gate lengths of 20 nm. Single fin transistors with W-f = 10 nm and channel height of 23 nm (fin aspect ratio of 2.3) have achieved a record transconductance of 160 mu S/mu m at V-DS = 0.5 V. When normalized to device footprint, it reaches a record high g(m)= 704 mu S/mu m. Digital etch has been shown to effectively improve the turn-off characteristics of the devices.-
dc.languageEnglish-
dc.publisherIEEE-
dc.title10-nm Fin-Width InGaSb p-Channel Self-Aligned FinFETs Using Antimonide-Compatible Digital Etch-
dc.typeConference-
dc.description.journalClass1-
dc.identifier.bibliographicCitation63rd IEEE Annual International Electron Devices Meeting (IEDM)-
dc.citation.title63rd IEEE Annual International Electron Devices Meeting (IEDM)-
dc.citation.conferencePlaceUS-
dc.citation.conferencePlaceSan Francisco, CA-
dc.citation.conferenceDate2017-12-02-
dc.relation.isPartOf2017 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)-
dc.identifier.wosid000424868900106-
dc.identifier.scopusid2-s2.0-85045186035-
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KIST Conference Paper > 2017
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