Full metadata record
DC Field | Value | Language |
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dc.contributor.author | Kim, Seong Kwang | - |
dc.contributor.author | Shim, Jaephil | - |
dc.contributor.author | Geum, Dae-Myeong | - |
dc.contributor.author | Kim, Chang Zoo | - |
dc.contributor.author | Kim, Han-Sung | - |
dc.contributor.author | Kim, Yeon-Su | - |
dc.contributor.author | Kim, Sang Hyeon | - |
dc.contributor.author | Song, Jin Dong | - |
dc.contributor.author | Choi, Sung-Jin | - |
dc.contributor.author | Kim, Dae Hwan | - |
dc.contributor.author | Choi, Won Jun | - |
dc.contributor.author | Kim, Hyung-jun | - |
dc.contributor.author | Kim, Dong Myong | - |
dc.contributor.author | Kang, Hang-Kyu | - |
dc.date.accessioned | 2024-01-19T11:09:13Z | - |
dc.date.available | 2024-01-19T11:09:13Z | - |
dc.date.created | 2022-03-01 | - |
dc.date.issued | 2016-12 | - |
dc.identifier.issn | 2380-9248 | - |
dc.identifier.uri | https://pubs.kist.re.kr/handle/201004/114684 | - |
dc.description.abstract | Defect-less semiconductor-on-insulator (-OI) by a cost-effective and low temperature process is strongly needed for monolithic 3D (M3D) integration. Toward this, in this paper, we present a cost-effective fabrication of the InGaAs01 structure featuring the direct wafer bonding (DWB) and the epitaxial lift-off (ELO) techniques as well as the re-use of the InP donor wafer. We systematically investigated the effects of the pre-patterning of the III-V layer before DWB, surface reforming (hydrophilic), and electro-chemical etching to speed up the ELO process for a fast and high-throughput process, which is essential for cost reduction. We also demonstrated the re-usability of the InP donor wafer. Finally, as a result of the high film quality of the InGaAs channel combined with DWB and ELO, fabricated InGaAs-OI MOSFETs show a record high effective mobility of similar to 2800 cm(2)/Vs among surface channel In0.53Ga0.47As MOSFETs reported so far. | - |
dc.language | English | - |
dc.publisher | IEEE | - |
dc.title | Cost-effective Fabrication of In0.53Ga0.47As-on-Insulator on Si for Monolithic 3D via Novel Epitaxial Lift-Off (ELO) and Donor Wafer Re-use | - |
dc.type | Conference | - |
dc.description.journalClass | 1 | - |
dc.identifier.bibliographicCitation | 62nd Annual IEEE International Electron Devices Meeting (IEDM) | - |
dc.citation.title | 62nd Annual IEEE International Electron Devices Meeting (IEDM) | - |
dc.citation.conferencePlace | US | - |
dc.citation.conferencePlace | San Francisco, CA | - |
dc.citation.conferenceDate | 2016-12-03 | - |
dc.relation.isPartOf | 2016 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | - |
dc.identifier.wosid | 000399108800154 | - |
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