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dc.contributor.authorEl Dirani, H.-
dc.contributor.authorBawedin, M.-
dc.contributor.authorLee, K.-
dc.contributor.authorParihar, M.-
dc.contributor.authorMescot, X.-
dc.contributor.authorFonteneau, P.-
dc.contributor.authorGaly, Ph.-
dc.contributor.authorGamiz, F.-
dc.contributor.authorKim, Y-T.-
dc.contributor.authorFerrari, P.-
dc.contributor.authorCristoloveanu, S.-
dc.date.accessioned2024-01-19T11:38:01Z-
dc.date.available2024-01-19T11:38:01Z-
dc.date.created2022-03-07-
dc.date.issued2016-10-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/114973-
dc.description.abstractWe demonstrate experimentally a capacitorless 1T-DRAM fabricated with 28 nm FDSOI. The Z(2)-FET memory cell features a large current sense margin and long retention time at T = 25 degrees C and 85 degrees C. Systematic measurements show that Z(2)-FET exhibits negligible OFF-state current at low drain/gate bias and is suitable as a low-power embedded memory.-
dc.languageEnglish-
dc.publisherIEEE-
dc.titleCompetitive 1T-DRAM in 28 nm FDSOI Technology for Low-Power Embedded Memory-
dc.typeConference-
dc.description.journalClass1-
dc.identifier.bibliographicCitationIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)-
dc.citation.titleIEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)-
dc.citation.conferencePlaceUS-
dc.citation.conferencePlaceBurlingame, CA-
dc.citation.conferenceDate2016-10-10-
dc.relation.isPartOf2016 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S)-
dc.identifier.wosid000392693000033-
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