Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeon, Dae-Young | - |
dc.contributor.author | Mouis, Mireille | - |
dc.contributor.author | Barraud, Sylvain | - |
dc.contributor.author | Ghibaudo, Gerard | - |
dc.date.accessioned | 2024-01-19T16:30:36Z | - |
dc.date.available | 2024-01-19T16:30:36Z | - |
dc.date.created | 2021-09-02 | - |
dc.date.issued | 2020-11 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://pubs.kist.re.kr/handle/201004/117949 | - |
dc.description.abstract | Substrate-bias-affected unique electrical characteristics of junctionless transistors (JLTs) were investigated in detail. Bulk channel thickness of JLTs (t(si_ eff)) was effectively modulated by back-gate bias (V-gb). The variation in threshold voltage (V-th) and mobility degradation were observed in the reduced t(si_eff), due to the negative V-gb-induced depletion of free electrons. The V-gb effect was also influenced significantly by the doping concentration in JLTs. In addition, numerical simulations verified those results and analytical equations explained well the experimental results. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | NANOWIRE TRANSISTORS | - |
dc.subject | MOBILITY | - |
dc.subject | WIDTH | - |
dc.title | Controlling the Effective Channel Thickness of Junctionless Transistors by Substrate Bias | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TED.2020.3020284 | - |
dc.description.journalClass | 1 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.67, no.11, pp.4736 - 4740 | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.citation.volume | 67 | - |
dc.citation.number | 11 | - |
dc.citation.startPage | 4736 | - |
dc.citation.endPage | 4740 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.identifier.wosid | 000584285700038 | - |
dc.identifier.scopusid | 2-s2.0-85095713456 | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.type.docType | Article | - |
dc.subject.keywordPlus | NANOWIRE TRANSISTORS | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordPlus | WIDTH | - |
dc.subject.keywordAuthor | Analytical equations | - |
dc.subject.keywordAuthor | effective channel thickness (t(si_eff)) | - |
dc.subject.keywordAuthor | junctionless transistors (JLTs) | - |
dc.subject.keywordAuthor | mobility degradation | - |
dc.subject.keywordAuthor | numerical simulation | - |
dc.subject.keywordAuthor | substrate bias | - |
dc.subject.keywordAuthor | variation in threshold voltage | - |
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