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dc.contributor.authorKim, Seong Kwang-
dc.contributor.authorShim, Jae-Phil-
dc.contributor.authorGeum, Dae-Myeong-
dc.contributor.authorKim, Chang Zoo-
dc.contributor.authorKim, Han-Sung-
dc.contributor.authorSong, Jin Dong-
dc.contributor.authorChoi, Sung-Jin-
dc.contributor.authorKim, Dae Hwan-
dc.contributor.authorChoi, Won Jun-
dc.contributor.authorKim, Hyung-Jun-
dc.contributor.authorKim, Dong Myong-
dc.contributor.authorKim, Sanghyeon-
dc.date.accessioned2024-01-20T00:33:54Z-
dc.date.available2024-01-20T00:33:54Z-
dc.date.created2021-09-05-
dc.date.issued2017-09-
dc.identifier.issn0018-9383-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/122344-
dc.description.abstractDefect less semiconductor-on-insulator (-OI) by a cost-effective and low-temperature process is strongly needed for monolithic 3-D integration. Toward this, in this paper, we present a cost-effective fabrication of the indium gallium arsenide-OI structure featuring the direct wafer bonding (DWB) and epitaxial lift-off (ELO) techniques as well as the reuse of the indium phosphide donor wafer. We systematically investigated the effects of the prepatterning of the III-V layer before DWB and surface reforming (hydrophilic) to speed up the ELO process for a fast and high-throughput process, which is essential for cost reduction. Thismethod provides an excellent crystal quality of In0.53Ga0.47As on Si. Crystal quality of the film was evaluated using Raman spectra, and transmission electron microscope. Finally, we achieved good electrical properties of In0.53Ga0.47As-OImetal-oxide-semiconductorfield-effect-transistors fabricated through the proposed DWB and ELO.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleFabrication of InGaAs-on-Insulator Substrates Using Direct Wafer-Bonding and Epitaxial Lift-Off Techniques-
dc.typeArticle-
dc.identifier.doi10.1109/TED.2017.2722482-
dc.description.journalClass1-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.9, pp.3594 - 3601-
dc.citation.titleIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.citation.volume64-
dc.citation.number9-
dc.citation.startPage3594-
dc.citation.endPage3601-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.identifier.wosid000408118700011-
dc.identifier.scopusid2-s2.0-85023641599-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.type.docTypeArticle-
dc.subject.keywordAuthorIII-V-
dc.subject.keywordAuthorIII-V compound semiconductor-
dc.subject.keywordAuthorepitaxial lift-off (ELO)-
dc.subject.keywordAuthorindium gallium arsenide (InGaAs)-
dc.subject.keywordAuthorInGaAs-on-insulator (OI)-
dc.subject.keywordAuthormetal-oxide-semiconductor field-effect-transistors (MOSFETs)-
dc.subject.keywordAuthorwafer bonding-
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