Charging effect of a nano-floating gate capacitor with double-layered Au nano-particles

Abstract

A nano-floating gate capacitor with double-layered An nano-particles embedded in a SiO1.3N layer was fabricated and characterized. The Au nano-particles were formed from An thin film with a nominal thickness of 1 nm and their average size and density were about 4 nm and 2 x 1012 cm(-2), respectively. After the post-annealing process at 800 degrees C for 10 s, the flat-band voltage shift of the nano-floating gate capacitor with double-layered An nano-particles was about 9 V when the applied gate voltage was swept from -10 V to +10 V. Significantly, the flat-band voltage shifts were improved after the post-annealing process. The double-layered An nano-particles embedded in a SiO1.3N dielectric showed feasibility as nano-floating gate capacitors for nonvolatile memories.