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dc.contributor.authorShim, SI-
dc.contributor.authorKwon, YS-
dc.contributor.authorKim, SI-
dc.contributor.authorKim, YT-
dc.contributor.authorPark, JH-
dc.date.accessioned2024-01-21T05:32:14Z-
dc.date.available2024-01-21T05:32:14Z-
dc.date.created2021-09-03-
dc.date.issued2005-03-
dc.identifier.issn0038-1101-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/136715-
dc.description.abstractMetal-ferroelectric-insulator-semiconductor field-effect transistor (MFISFET) with Pt-SrBi2Ta2O9 (SBT)-Y2O3-Si gate structure was fabricated with a selective dry etching of SBT and Y2O3. The etching characteristics of SBT, Y2O3, and silicon were investigated with various Ar/Cl-2 gas mixing ratios. Inductively coupled plasma (ICP) Powers, and RF bias powers and the surface condition after the etching was analyzed by using the scanning electron microscopy (SEM), atomic force microscopy (AFM), X-ray photoemission spectroscopy (XPS), and Rutherford back scattering (RBS) measurement. The etch-stop process was successfully achieved at the condition of 50% Cl-2 concentration with the ICP power of 900 W and the RF bias power of 100 W where the selectivity of SBT to Y2O3 was 4. The fabricated MFISFET with the etch-stop process showed good memory operation with 1.2 V threshold voltage difference and more than three orders of drain current difference in the on/off drain current ratio at the operating voltage of 7 V. These results meant that the etch-stop process was successfully carried out and applied to MFISFET fabrication without degradation of the ferroelectric characteristics and damage on silicon surface. (C) 2004 Elsevier Ltd. All rights reserved.-
dc.languageEnglish-
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.subjectFERROELECTRIC MEMORY-
dc.subjectTHIN-FILMS-
dc.subjectSEMICONDUCTOR-
dc.subjectRETENTION-
dc.subjectVOLTAGE-
dc.subjectFET-
dc.titleMemory operation of Pt-SrBi2Ta2O9-Y2O3-Si field-effect transistor with damage-free selective dry etching process-
dc.typeArticle-
dc.identifier.doi10.1016/j.sse.2004.11.015-
dc.description.journalClass1-
dc.identifier.bibliographicCitationSOLID-STATE ELECTRONICS, v.49, no.3, pp.497 - 504-
dc.citation.titleSOLID-STATE ELECTRONICS-
dc.citation.volume49-
dc.citation.number3-
dc.citation.startPage497-
dc.citation.endPage504-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.identifier.wosid000226942300031-
dc.identifier.scopusid2-s2.0-12344322860-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.relation.journalWebOfScienceCategoryPhysics, Condensed Matter-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaPhysics-
dc.type.docTypeArticle-
dc.subject.keywordPlusFERROELECTRIC MEMORY-
dc.subject.keywordPlusTHIN-FILMS-
dc.subject.keywordPlusSEMICONDUCTOR-
dc.subject.keywordPlusRETENTION-
dc.subject.keywordPlusVOLTAGE-
dc.subject.keywordPlusFET-
dc.subject.keywordAuthorferroclectric-
dc.subject.keywordAuthorferroelectric memory-
dc.subject.keywordAuthorfield-effect transistor-
dc.subject.keywordAuthorSBT-
dc.subject.keywordAuthorRIE-
dc.subject.keywordAuthoretch-stop-
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KIST Article > 2005
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