INTERFACE CONSTRAINTS IN INP MIS STRUCTURES

Abstract

This work is a study on the role of the interface defects on the nonuniformity of device characteristics for various InP Metal-Insulator-Semiconductor (MIS) diodes such as plasma oxide/InP, MOCVD-grown Al2O3/InP and PECVD-grown Si3N4/InP. Our investigations are concentrated on the compositional structures at the insulator/semiconductor interface and their effects on the electrical properties of the MIS diodes. The sputtering Auger analysis and the frequency dependent C-V measurements on the plasma oxide/InP diode showed that the interface chemistry is important for the stable electrical characteristics. In Al2O3/p-InP structure, the pinning of the surface Fermi level could be induced by the tunnel trapping of free charges into the insulator due to the existence of a potential barrier for the detrapping of charges as well as the charge trapping centers. In the case of Si3N4/n-InP, any potential barrier for the detrapping of tunnel captured electrons is not observed. It is also found that the trapping mechanism in Si3N4/InP structure is different form that of SiO2/InP structure. The effect of sulfuration of InP surface on the stability of interface properties is also discussed.