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Showing results 1 to 7 of 7

Issue Date	Title	Author(s)
2020-02	3D Stackable Synaptic Transistor for 3D Integrated Artificial Neural Networks	Kim, Seong Kwang; Jeong, YeonJoo; Bidenko, Pavlo; Lim, Hyeong-Rak; Jeon, Yu -Rim; Kim, Hansung; Lee, Yun Jung; Geum, Dae-Myeong; Han, JaeHoon; Choi, Changhwan; Kim, Hyung-jun; Kim, SangHyeon
2021-06	Electrical Analysis for Wafer-Bonded Interfaces of p(+)GaAs/n(+)InGaAs and p(+)InGaAs/n(+)InGaAs	Geum, Dae-Myeong; Kim, Seong Kwang; Lim, Hyeong-Rak; Park, Juhyuk; Jeong, Jaeyong; Han, Jae Hoon; Choi, Won Jun; Kim, Hyo-Jin; Kim, Sanghyeon
2018-05	Heterogeneous Integration Toward a Monolithic 3-D Chip Enabled by III-V and Ge Materials	Kim, Sang-Hyeon; Kim, Seong-Kwang; Shim, Jae-Phil; Geum, Dae-Myeong; Ju, Gunwu; Kim, Han-Sung; Lim, Hee-Jeong; Lim, Hyeong-Rak; Han, Jae-Hoon; Lee, Subin; Kim, Ho-Sung; Bidenko, Pavlo; Kang, Chang-Mo; Lee, Dong-Seon; Song, Jin-Dong; Choi, Won Jun; Kim, Hyung-Jun
2019-09	Impact of Bottom-Gate Biasing on Implant-Free Junctionless Ge-on- Insulator n-MOSFETs	Lim, Hyeong-Rak; Kim, Seong Kwang; Han, Jae-Hoon; Kim, Hansung; Geum, Dae-Myeong; Lee, Yun-Joong; Ju, Byeong-Kwon; Kim, Hyung-Jun; Kim, Sanghyeon
2019-09-30	Improved characteristics of MOS interface between In0.53Ga0.47As and insulator by H-2 annealing with Pt gate electrode	Kim, Seong Kwang; Geum, Dae-Myeong; Lim, Hyeong-Rak; Kim, Hansung; Han, Jae-Hoon; Hwang, Do Kyung; Song, Jin Dong; Kim, Hyung-jun; Kim, Sanghyeon
2018-03	Low-Temperature Material Stacking of Ultrathin Body Ge (110)-on-Insulator Structure via Wafer Bonding and Epitaxial Liftoff From III-V Templates	Shim, Jae-Phil; Kim, Han-Sung; Ju, Gunwu; Lim, Hyeong-Rak; Kim, Seong Kwang; Han, Jae-Hoon; Kim, Hyung-Jun; Kim, Sang-Hyeon
2020-04	Photo-Responsible Synapse Using Ge Synaptic Transistors and GaAs Photodetectors	Kim, Seong Kwang; Geum, Dae-Myeong; Lim, Hyeong-Rak; Han, JaeHoon; Kim, Hyungjun; Jeong, YeonJoo; Kim, Sang-Hyeon

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