Low-Temperature Material Stacking of Ultrathin Body Ge (110)-on-Insulator Structure via Wafer Bonding and Epitaxial Liftoff From III-V Templates

Authors
Shim, Jae-PhilKim, Han-SungJu, GunwuLim, Hyeong-RakKim, Seong KwangHan, Jae-HoonKim, Hyung-JunKim, Sang-Hyeon
Issue Date
2018-03
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.3, pp.1253 - 1257
Abstract
In this brief, we fabricated Ge (110)-on-insulator (-OI) structures on Si substrates viawafer bonding and epitaxial lift-off (ELO) process using Ge layer grown on GaAs for low-temperature layer stacking toward monolithic 3-D integration. We also systematically investigated the lateral etching behaviors of AlAs, which was used as a sacrificial layer in the ELO process, on GaAs (110) substrates. Fabricated Ge (110)-OI was analyzed by surface atomic force microscopy, X-ray diffraction, Raman shift, and transmission electron microscope analyses. We found that the 40-nm-thick ultrathin-body Ge (110)-OI has very high crystal quality, indicating our Ge stacking process is very stable.
Keywords
SI SUBSTRATE; SI SUBSTRATE; Epitaxial liftoff (ELO); Ge; Ge-on insulator (OI); heterogeneous integration; monolithic 3-D (M3-D); wafer bonding
ISSN
0018-9383
URI
https://pubs.kist.re.kr/handle/201004/121674
DOI
10.1109/TED.2018.2793285
Appears in Collections:
KIST Article > 2018
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