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dc.contributor.authorKIM Hyoung Gon-
dc.contributor.authorKwon Yong-Moo-
dc.contributor.author민남기-
dc.contributor.author김재형-
dc.date.accessioned2024-01-13T22:31:32Z-
dc.date.available2024-01-13T22:31:32Z-
dc.date.created2021-09-29-
dc.identifier.urihttps://pubs.kist.re.kr/handle/201004/112120-
dc.languageEnglish-
dc.titleA pipelined architecture for VLSI implementation of quantizer/inverse quantizer processor for video CODEC.-
dc.typeConference-
dc.description.journalClass1-
dc.identifier.bibliographicCitationProceedings of the fifth international conference on signal processing applications & technology (IC, pp.1737 - 1742-
dc.citation.titleProceedings of the fifth international conference on signal processing applications & technology (IC-
dc.citation.startPage1737-
dc.citation.endPage1742-
dc.citation.conferencePlaceUS-
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